Material and device technologies for advanced, high-performance, and radiation-hardened CMOS circuits

被引:4
|
作者
Smeltzer, R.K. [1 ]
Schnable, G.L. [1 ]
机构
[1] RCA Lab, United States
关键词
Integrated Circuits - Radiation Effects - Substrates;
D O I
10.1016/0167-9317(88)90008-1
中图分类号
学科分类号
摘要
The problems associated with small feature-size devices are compounded when radiation hardness requirements are imposed upon circuits, and this additional requirement has spawned the developing of a variety of complex, nonstandard, CMOS/bulk processes. In contrast CMOS/SOS technology, with only minor modifications to a commercial production process, is able to produce circuits that can satisfy the requirements associated with very severe radiation environments and is now gaining wide acceptance in the military and aerospace marketplace. In this paper, the various implementations of CMOS technology are reviewed with emphasis given to issues associated with substrate materials and with radiation hardness in small feature-size devices.
引用
收藏
页码:79 / 91
相关论文
共 50 条
  • [1] RADIATION-HARDENED CMOS-SOS LSI CIRCUITS
    AUBUCHON, KG
    PETERSON, HT
    SHUMAKE, DP
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1976, 23 (06) : 1613 - 1616
  • [2] PROCESS TECHNOLOGY FOR RADIATION-HARDENED CMOS INTEGRATED-CIRCUITS
    DAWES, WR
    DERBENWICK, GF
    GREGORY, BL
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (04) : 459 - 465
  • [3] PROCESS OPTIMIZATION OF RADIATION-HARDENED CMOS INTEGRATED-CIRCUITS
    DERBENWICK, GF
    GREGORY, BL
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1975, 22 (06) : 2151 - 2156
  • [4] DESIGN OPTIMIZATION OF RADIATION-HARDENED CMOS INTEGRATED-CIRCUITS
    FOSSUM, JG
    DERBENWICK, GF
    GREGORY, BL
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1975, 22 (06) : 2208 - 2213
  • [5] High-performance, Radiation-Hardened Electronics for Space and Lunar Environments
    Keys, Andrew S.
    Adams, James H.
    Cressler, John D.
    Dartyl, Ronald C.
    Johnson, Michael A.
    Patrick, Marshall C.
    SPACE TECHNOLOGY AND APPLICATIONS INTERNATIONAL FORUM STAIF 2008, 2008, 969 : 749 - +
  • [6] TECHNOLOGICAL ADVANCES IN MANUFACTURE OF RADIATION-HARDENED CMOS INTEGRATED-CIRCUITS
    PIKOR, A
    REISS, EM
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1977, 24 (06) : 2047 - 2050
  • [7] RADIATION-HARDENED JFET DEVICES AND CMOS CIRCUITS FABRICATED IN SOI FILMS
    TSAUR, BY
    SFERRINO, VJ
    CHOI, HK
    CHEN, CK
    MOUNTAIN, RW
    SCHOTT, JT
    SHEDD, WM
    LAPIERRE, DC
    BLANCHARD, R
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1986, 33 (06) : 1372 - 1376
  • [8] RADIATION-HARDENED BULK CMOS DEVELOPMENT
    DRESSENDORFER, PV
    TRANSACTIONS OF THE AMERICAN NUCLEAR SOCIETY, 1985, 49 (JUN): : 23 - 23
  • [9] RADIATION-HARDENED JFET DEVICES AND CMOS CIRCUITS FABRICATED IN SOI FILMS.
    Tsaur, B-Y
    Sferrino, Y.J.
    Choi, H.K.
    Chen, C.K.
    Mountain, R.W.
    Schott, J.T.
    Shedd, W.M.
    LaPierre, D.C.
    Blanchard, R.
    IEEE Transactions on Nuclear Science, 1986, NS-33 (06)
  • [10] HIGH-PERFORMANCE CMOS/SOS CIRCUITS IN SPEAR MATERIAL
    MAYER, DC
    LEE, A
    KRAMER, AR
    MILLER, KD
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (01) : 318 - 321