DIGITAL SPEED CONTROLLER.

被引：0
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作者：
Pujari, S.S.
Shrinivasan, V.
Upadhyay, A.K.
机构：
来源：
Journal of the Institution of Engineers. India. Electronics and telecommunication engineering division | 1984年 / 64卷
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摘要：
A scheme for incorporation of digital speed loop, with analog current loop in a two-loop speed control system, to facilitate easy interface with the computer has been presented. The principle involves pulse comparison of pulse trains, from a pulse tacho coupled to the drive motor with a reference pulse train, which results in fast and accurate speed control. Methods of speed variation and reversal are presented.
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页码：52 / 55
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