SCOPE TRIGGER SYSTEM EASES HIGH-SPEED LOGIC DESIGN.

被引：0

作者：

Evel, Ed ^{[1
]}

机构：

[1] Hewlett-Packard Co, Hewlett-Packard Co

来源：

New Electronics | 1984年 / 17卷 / 21期

关键词：

ELECTRONIC CIRCUITS; COMPARATOR - LOGIC CIRCUITS; EMITTER COUPLED - LOGIC DEVICES - Threshold Elements - OSCILLOSCOPES; CATHODE RAY;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

The increased usage of new high-speed logic families, such as ECL 10KH and 100K, has greatly increased the demands placed on the test equipment needed for the design, development, and troubleshooting of systems designed with such logic. A high bandwidth oscilloscope is essential for evaluation and troubleshooting such circuits. High bandwidth in the HP54100 A/D is achieved using a random-repetitive sampling technique where a 1GHz sampler is run continuously at a 40 megasample/second digitizing rate. The sampler output is converted and stored in digital memory for later display.

引用

页码：51 / 52

共 50 条

[21] HIGH-SPEED DATA ACQUISITION DESIGN SYSTEM
LEVREAULT, JE
ELECTRONIC PRODUCTS MAGAZINE, 1983, 25 (12): : 89 - 92
[22] Design on a high-speed image collecting system
Li, Chang-Le
Zang, Xi-Zhe
Zhao, Jie
Shiyou Huagong Gaodeng Xuexiao Xuebao/Journal of Petrochemical Universities, 2007, 20 (03): : 101 - 104
[23] High-speed data acquisition system design
Choubey, Amit Kumar
Raushan, Ravi
Kumar, V. Manoj
ISSCAA 2006: 1st International Symposium on Systems and Control in Aerospace and Astronautics, Vols 1and 2, 2006, : 946 - 951
[24] PC-board layout eases high-speed transmission
Adams, G
EDN, 2001, 46 (25) : 110 - 110
[25] Scope/logic-analyzer team measures timing compliance of high-speed, synchronous designs
Zivny, P
EDN, 2000, 45 (12) : 123 - +
[26] Design of fuzzy logic guidance law against high-speed target
Lin, CL
Chen, YY
JOURNAL OF GUIDANCE CONTROL AND DYNAMICS, 2000, 23 (01) : 17 - 25
[27] INTERCONNECTION OF HIGH-SPEED LOGIC CIRCUITS
JANISZ, T
MARTIN, RC
IEEE TRANSACTIONS ON COMPUTERS, 1970, C 19 (09) : 831 - &
[28] Analysis of high-speed logic families
Privitera, G
Pessolano, F
INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, 2003, 2799 : 2 - 10
[29] HIGH-SPEED BIPOLAR LOGIC LSI
SUDO, T
NAKASHIMA, T
YOSHII, A
REVIEW OF THE ELECTRICAL COMMUNICATIONS LABORATORIES, 1979, 27 (1-2): : 55 - 71
[30] HyperPipelining of High-Speed Interface Logic
Baeckler, Gregg
PROCEEDINGS OF THE 2016 ACM/SIGDA INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE GATE ARRAYS (FPGA'16), 2016, : 2 - 2

← 1 2 3 4 5 →