MICROPROCESSOR SERIES - 5: ADDRESS DECODING.

被引：0

|

作者：

Anon

机构：

来源：

Vector (Electrical Engineering) | 1987年

关键词：

D O I：

暂无

中图分类号：

学科分类号：

摘要：

引用

收藏

页码：14 / 15

相关论文

共 50 条

[21] ASSEMBLER PROGRAMS PROM FOR ADDRESS DECODING
LOBBAN, PE
ELECTRONIC DESIGN, 1983, 31 (18) : 166 - 167
[22] MICROPROCESSOR LOAD STACK ADDRESS CONTROL COMMAND.
Cannon, J.W.
Phillips, L.A.
IBM technical disclosure bulletin, 1984, 26 (10 A): : 5207 - 5209
[23] Address addition and decoding without carry propagation
Lee, YH
Hwang, SH
IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 1997, E80D (01) : 98 - 100
[24] MICROPROCESSOR-BASED VITERBI DECODING OF CONVOLUTIONAL CODES.
Maskara, S.L.
Ghorai, Subrata
Mitra, P.
IETE Journal of Research, 1982, 28 (01) : 17 - 22
[25] A SWITCHED MEMORY DECODING CIRCUIT FOR BUS ORIENTED MICROPROCESSOR SYSTEMS
BERGMAN, GD
INTERNATIONAL JOURNAL OF ELECTRONICS, 1987, 62 (05) : 733 - 738
[26] SYNCHRONIZATION OF MICROPROCESSOR ADDRESS STROBE USING LSSD HARDWARE.
Anon
IBM technical disclosure bulletin, 1986, 28 (08): : 3457 - 3458
[27] MICROPROCESSOR TALKS TO DUMB PERIPHERALS WITH MINIMAL USE OF ADDRESS SPACE
ROGERS, MS
ELECTRONIC DESIGN, 1978, 26 (09) : 140 - 140
[28] Morphological decomposition compensates for imperfections in phonological decoding. Neural evidence from typical and dyslexic readers of an opaque orthography
Bitan, Tali
Weiss, Yael
Katzir, Tami
Truzman, Tammar
CORTEX, 2020, 130 : 172 - 191
[29] REALTIME IMPLEMENTATION OF THE VITERBI DECODING ALGORITHM ON A HIGH-PERFORMANCE MICROPROCESSOR
SAID, SM
DIMOND, KR
MICROPROCESSORS AND MICROSYSTEMS, 1986, 10 (01) : 11 - 16
[30] ADDRESS SELECTION BY COMBINATORIAL DECODING OF SEMICONDUCTOR MEMORY ARRAYS
GREENE, FS
SANDER, WB
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1969, SC 4 (05) : 295 - &

← 1 2 3 4 5 →