I2L CLOCKED GATE ARRAY FOR UNDERGRADUATE DESIGN EXERCISES.

被引：0

作者：

Jesshope, C.R. ^{[1
]}

Ashburn, P. ^{[1
]}

机构：

[1] Univ of Southampton, Dep of, Electronics & Information, Engineering, Southampton, Engl, Univ of Southampton, Dep of Electronics & Information Engineering, Southampton, Engl

来源：

IEE Proceedings I: Solid State and Electron Devices | 1985年 / 132卷 / 2 pt 1期

关键词：

D O I：

10.1049/ip-i-1.1985.0015

中图分类号：

学科分类号：

摘要：

Electrical engineering

引用

页码：54 / 61

共 50 条

[1] I2L CLOCKED GATE ARRAY FOR UNDERGRADUATE DESIGN EXERCISES.
Univ of Southampton, Dep of, Electronics & Information, Engineering, Southampton, Engl, Univ of Southampton, Dep of Electronics & Information Engineering, Southampton, Engl
IEE Proc Part E, 1985, 2 (54-61):
[2] AN I2L CLOCKED GATE ARRAY FOR UNDERGRADUATE DESIGN EXERCISES
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ASHBURN, P
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