Gate voltage reduction of a ferroelectric gate field-effect transistor memory with an intermediate electrode on data-reading

被引：0
|
作者：
Horita, Susumu [1 ]
Khoa, Tran Dang [1 ]
机构：
[1] School of Materials Science, Japan Adv. Inst. of Sci. and Technol, 1-1 Asahidai, Tatsunokuchi, Ishikawa 923-1292, Japan
来源：
Japanese Journal of Applied Physics, Part 2: Letters | 2003年 / 42卷 / 4 A期
关键词：
D O I：
10.1143/jjap.42.l365
中图分类号：
学科分类号：
摘要：
Field effect transistors
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