Characteristics of cell latch and leakage current at standby state in 6-T low-power static random access memory (SRAM) device

The standby current at device off-state is investigated against the measuring mode in 6-T and low-power static random access memory (SRAM) device with short gate length of 0.12 μm and high density of 32 M-bit. It can be found that there is the difference of the standby currents between initial and D0 modes and this discrepancy in the standby current is closely related to the leakage current of cell n-type metal-oxide semiconductor field-effect transistor (NMOSFET), especially pull-down transistor. This discrepancy in the standby currents among the measuring modes can be explained with the characteristic of the cell latch using its dependence on the leakage current of pull-down transistor and it will be shown that the cell spontaneously moves to minimize the standby current.