Design Problems of Fully Integrated 8-Bit MOS-A/D Converters Using the Parallel Method.

被引：0

作者：

Riedel, Friedberth ^{[1
]}

机构：

[1] Technische Univ Dresden, Sektion, Informationstechnik, Dresden, East, Ger, Technische Univ Dresden, Sektion Informationstechnik, Dresden, East Ger

来源：

Zeitschrift fur Elektrische Informations - und Energietechnik | 1983年 / 13卷 / 04期

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摘要：

引用

页码：349 / 365

共 3 条

[1] EASE BAR-CODE-READER DESIGN BY USING 8-BIT A D CONVERTERS
MARKELL, R
EDN, 1989, 34 (22) : 203 - &
[2] Design of a low-power 8 x 8-bit parallel multiplier using MOS current mode logic circuit
Kim, J. B.
Lee, Y. S.
INTERNATIONAL JOURNAL OF ELECTRONICS, 2007, 94 (10) : 905 - 913
[3] DESIGN OF A 5-BIT FULLY PARALLEL ANALOG TO DIGITAL CONVERTER USING COMMON GATE DIFFERRENTIAL MOS PAIR-BASED COMPARATOR
Aytar, Oktay
JOURNAL OF ELECTRICAL ENGINEERING-ELEKTROTECHNICKY CASOPIS, 2015, 66 (05): : 250 - 256

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