VARIABLE-LENGTH DATA ASSEMBLER.

This technique relates to packing variable length data into units of fixed lengths by parallel input loading the ith code word, the L less than equivalent to N significant digits of which being placed directly into a portion of an assembly register. Digits in excess of N are buffered and overlapped with the assembly of the ith plus 1 codeword. The input loading of the significant digits of a codeword and the position placement within the assembly register are both controlled by a modulo N accumulator.