VARIABLE-LENGTH DATA ASSEMBLER.

被引：0
|
作者：
Dishon, Y.
Gindi, A.M.
Martin, R.W.
机构：
来源：
IBM Technical Disclosure Bulletin | 1976年 / 19卷 / 05期
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This technique relates to packing variable length data into units of fixed lengths by parallel input loading the ith code word, the L less than equivalent to N significant digits of which being placed directly into a portion of an assembly register. Digits in excess of N are buffered and overlapped with the assembly of the ith plus 1 codeword. The input loading of the significant digits of a codeword and the position placement within the assembly register are both controlled by a modulo N accumulator.
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页码：1892 / 1895
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