ATE FOR VLSI/LSI.

被引：0
|
作者：
Anon
机构：
来源：
Evaluation Engineering | 1984年 / 23卷 / 09期
关键词：
AUTOMATIC TEST EQUIPMENT (ATE);
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：54 / 71
相关论文
共 50 条
  • [31] NITRIDE SELF-ALIGNED (NSA) PROCESS FOR BIPOLAR IC/LSI.
    Komatsu, Shigeru
    Koyanagi, Tsutomu
    Ito, Takao
    Toshiba review International ed., 1983, (143): : 36 - 40
  • [32] Optimization of contact hole lithography for 65-nm node logic LSI.
    Setta, Yuji
    Futatsuya, Hiroki
    Sagisaka, Atsushi
    Chijimatsu, Tatsuo
    Minami, Takayoshi
    Sugimoto, Fumitoshi
    Ishikawa, Seiichi
    Asai, Satoru
    OPTICAL MICROLITHOGRAPHY XIX, PTS 1-3, 2006, 6154 : U2279 - U2286
  • [33] LSI-VLSI DESIGN AUTOMATION
    RAYMOND, TC
    COMPUTER, 1981, 14 (07) : 89 - 101
  • [34] VLSI/LSI TESTERS - SPEED IS PRIMARY
    OHR, S
    ELECTRONIC DESIGN, 1983, 31 (03) : 71 - &
  • [35] How ATE planning affects LSI manufacturing cost
    Nakamae, K
    Sakamoto, H
    Fujioka, H
    IEEE DESIGN & TEST OF COMPUTERS, 1996, 13 (04): : 66 - 73
  • [36] HIGH-LEVEL LANGUAGE MODELS ATE LSI
    MCLEOD, J
    ELECTRONIC DESIGN, 1980, 28 (22) : 32 - 33
  • [37] How ATE planning affects LSI manufacturing cost
    Osaka Univ, Osaka, Japan
    IEEE Des Test Comput, 4 (66-73):
  • [38] VLSI-ATE SELECTION MATRIX.
    HEALY, JAMES T.
    1982, V 25 (N 11): : 81 - 88
  • [39] FUNCTIONAL TESTING OF LSI VLSI CHIPS - A SURVEY
    LALA, PK
    BERENJIAN, N
    JOURNAL OF THE INSTITUTION OF ELECTRONIC AND RADIO ENGINEERS, 1987, 57 (06): : 255 - 261
  • [40] LSI/VLSI与整机的集成
    李铁映
    塔玉铭
    微处理机, 1981, (03) : 1 - 12
12345