Micro-architecture evaluation using performance vectors

被引:0
|
作者
Krishnaswamy, Umesh [1 ]
Scherson, Isaac D. [1 ]
机构
[1] Univ of California, Irvine, United States
来源
Performance Evaluation Review | 1996年 / 24卷 / 01期
关键词
Computational methods - Computer operating systems - Microcomputers - Nonlinear equations - Performance - Response time (computer systems) - Vectors;
D O I
暂无
中图分类号
学科分类号
摘要
Benchmarking is a widely used approach to measure computer performance. Current use of benchmarks only provides running times to describe the performance of a tested system. Glancing through these execution times provides little or no information about system strengths and weaknesses. A novel benchmarking methodology is proposed to identify key performance parameters; the methodology is based on measuring performance vectors. A performance vector is a vector of ratings that represents delivered performance of primitive operations of a system. Measuring the performance vector of a system in a typical user workload can be a tough problem. We show how the performance vector falls out of an equation consisting of dynamic instruction counts and execution times of benchmarks. We present a non-linear approach for computing the performance vector. The efficacy of the methodology is ascertained by evaluating the micro-architecture of the Sun SuperSPARC super-scalar processor using SPEC benchmarks. Results show interesting tradeoffs in the SuperSPARC and speak favorably of our methodology.
引用
收藏
页码:148 / 159
相关论文
共 50 条
  • [1] Micro-architecture performance estimation by formula
    Simonson, LJ
    He, L
    [J]. EMBEDDED COMPUTER SYSTEMS: ARCHITECTURES, MODELING, AND SIMULATION, 2005, 3553 : 192 - 201
  • [2] MICRO-ARCHITECTURE ENHANCEMENTS FOR IMPROVED PERFORMANCE OF PROCESSOR.
    Jones, J.F.
    Ramirez Jr., R.
    Thatcher, L.E.
    Villante, A.E.
    Wyatt, V.D.
    [J]. IBM technical disclosure bulletin, 1983, 26 (05): : 2254 - 2256
  • [3] Analytical Processor Performance and Power Modeling Using Micro-Architecture Independent Characteristics
    Van den Steen, Sam
    Eyerman, Stijn
    De Pestel, Sander
    Mechri, Moncef
    Carlson, Trevor E.
    Black-Schaffer, David
    Hagersten, Erik
    Eeckhout, Lieven
    [J]. IEEE TRANSACTIONS ON COMPUTERS, 2016, 65 (12) : 3537 - 3551
  • [4] Dentin micro-architecture using harmonic generation microscopy
    Elbaum, R.
    Tal, E.
    Perets, A. I.
    Oron, D.
    Ziskind, D.
    Silberberg, Y.
    Wagner, H. D.
    [J]. JOURNAL OF DENTISTRY, 2007, 35 (02) : 150 - 155
  • [5] Verifying Micro-Architecture Simulators using Event Traces
    Nyew, Hui Meen
    Onder, Nilufer
    Onder, Soner
    Wang, Zhenlin
    [J]. PROCEEDINGS OF THE 28TH ACM INTERNATIONAL CONFERENCE ON SUPERCOMPUTING, (ICS'14), 2014, : 323 - 332
  • [6] Micro-architecture verification for microprocessors
    Bin, E
    Fournier, L
    [J]. 5th International Workshop on Microprocessor Test and Verification: Common Challenges and Solutions, Proceedings, 2005, : 112 - 113
  • [7] A retargetable micro-architecture simulator
    Mon, WS
    Zhu, JW
    [J]. 40TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2003, 2003, : 752 - 757
  • [8] Parting Shots MICRO-ARCHITECTURE
    Parsons, Ian
    [J]. ELEMENTS, 2013, 9 (03) : 238 - 238
  • [9] MICRO-ARCHITECTURE OR CHEMICAL TAILORING
    FAKTOR, MM
    HECKINGB.R
    [J]. POST OFFICE ELECTRICAL ENGINEERS JOURNAL, 1971, 64 (OCT): : 177 - &
  • [10] Micro-Architecture Independent Analytical Processor Performance and Power Modeling
    Van den Steen, Sam
    De Pestel, Sander
    Mechri, Moncef
    Eyerman, Stijn
    Carlson, Trevor
    Black-Schaffer, David
    Hagersten, Erik
    Eeckhout, Lieven
    [J]. 2015 IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS AND SOFTWARE (ISPASS), 2015, : 32 - 41