共 50 条
- [1] Parallel genetic algorithms for simulation-based sequential circuit test generation TENTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 1997, : 475 - 481
- [3] Invalid state identification for sequential circuit test generation PROCEEDINGS OF THE FIFTH ASIAN TEST SYMPOSIUM (ATS '96), 1996, : 10 - 15
- [5] SIMPLIFYING SEQUENTIAL-CIRCUIT TEST-GENERATION IEEE DESIGN & TEST OF COMPUTERS, 1994, 11 (03): : 28 - 38
- [6] Comparative analysis of sequential circuit test generation approaches BEC 2004: PROCEEDING OF THE 9TH BIENNIAL BALTIC ELECTRONICS CONFERENCE, 2004, : 225 - 228
- [8] A test generation approach for non-synchronous sequential circuit ICEMI 2005: Conference Proceedings of the Seventh International Conference on Electronic Measurement & Instruments, Vol 1, 2005, : 475 - 480
- [10] Sequential test generation based on circuit pseudo-transformation SIXTH ASIAN TEST SYMPOSIUM (ATS'97), PROCEEDINGS, 1997, : 62 - 67