ARRAY PROCESSOR AS AN INTELLIGENT SIMULATION CO-PROCESSOR.

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Alexander, Peter
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Proceedings of the Summer Computer Simulation Conference | 1980年
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A description is given of the use of array processors as high speed intelligent peripheral devices for a minicomputer based simulation system. The Macro Arithmetic Processor (MAP) is presented as an example, and a review of the hardware and software architectural features is given. The internal multiprocessor structure of MAP is highlighted, and the way in which these programmable units interact is discussed. An overview of simulation applications is given.
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页码：963 / 967
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