共 50 条
- [2] Hybrid Algorithm for Floorplanning Using B*-tree Representation 2009 THIRD INTERNATIONAL SYMPOSIUM ON INTELLIGENT INFORMATION TECHNOLOGY APPLICATION, VOL 3, PROCEEDINGS, 2009, : 228 - +
- [3] A genetic algorithm for VLSI floorplanning using O-tree representation APPLICATIONS OF EVOLUTIONARY COMPUTING, PROCEEDINGS, 2005, 3449 : 215 - 224
- [4] Performance Driven VLSI Floorplanning with B*Tree Representation Using Differential Evolutionary Algorithm TRENDS IN NETWORKS AND COMMUNICATIONS, 2011, 197 : 445 - 456
- [5] Temporal floorplanning using the T-tree formulation ICCAD-2004: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, IEEE/ACM DIGEST OF TECHNICAL PAPERS, 2004, : 300 - 305
- [7] Floorplanning with clock tree estimation 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 6244 - 6247