Low-latency Transaction Processing Using NVM and HTM

被引：0
|
作者：
Wei, Xing-Da [1 ]
Lu, Fang-Ming [1 ]
Chen, Rong [1 ]
Chen, Hai-Bo [1 ]
Zang, Bin-Yu [1 ]
机构：
[1] Institute of Parallel and Distributed Systems, Shanghai Jiao Tong University, Shanghai,200240, China
来源：
Ruan Jian Xue Bao/Journal of Software | 2022年 / 33卷 / 03期
关键词：
44;
D O I：
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中图分类号：
学科分类号：
摘要：
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页码：849 / 866
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