Fairness via source throttling: A configurable and hgh-performance fairness substrate for multi-core memory systems

被引：0
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作者：
Ebrahimi, Eiman [1 ]
Lee, Chang Joo [1 ]
Mutlu, Onur [2 ]
Patt, Yale N. [1 ]
机构：
[1] Department of Electrical and Computer Engineering, University of Texas, Austin, United States
[2] Computer Architecture Laboratory (CALCM), Carnegie Mellon University, United States
来源：
ACM SIGPLAN Notices | 2010年 / 45卷 / 03期
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页码：335 / 346
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    [J]. ASPLOS XV: FIFTEENTH INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS, 2010, : 335 - 346
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