Modeling and sizing of power-gating single-rail MOS current mode logic

被引：0
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作者：
机构：
[1] Yang, D.
[2] Hu, J.
[3] Xiang, X.
来源：
Yang, D. | 1600年 / Bentham Science Publishers B.V., P.O. Box 294, Bussum, 1400 AG, Netherlands卷 / 08期
关键词：
Low power electronics;
D O I：
10.2174/1874129001408010286
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