Fault detection scheme for AES using optimization for mix column

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Department of Electronics and Communication Engineering, Anna University Coimbatore, Tamil Nadu, India [1 ]
不详 [2 ]
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Int. J. Comput. Sci. Issues | / 4 4-3卷 / 354-360期
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Compilation and indexing terms; Copyright 2025 Elsevier Inc;
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摘要
Cryptography - Energy efficiency - Data privacy - Fault detection - Field programmable gate arrays (FPGA)
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