Project GRAMS: A graphical reconfigurable architecture MIPS simulator

被引：0
|
作者：
Systems Architecture Laboratory, Department of Electrical and Electronics Engineering, University of the Philippines, Philippines [1 ]
机构：
来源：
IEEE Reg 10 Annu Int Conf Proc TENCON | 2008年
关键词：
722 Computer Systems and Equipment - 723.2 Data Processing and Image Processing - 971 Social Sciences;
D O I：
4766609
中图分类号：
学科分类号：
摘要：
4
引用
收藏
相关论文
共 50 条
  • [21] Reconfigurable simulator using graphical user interface (GUI) and object-oriented design for OFDM systems
    Jaber, Nabih
    Tepe, Kemal E.
    Abdel-Raheem, Esam
    SIMULATION MODELLING PRACTICE AND THEORY, 2011, 19 (05) : 1294 - 1317
  • [22] Implementing an ISR defense on a MIPS architecture
    Sanabria Sancho, Loriana
    Gabriela Barrantes, Elena
    2017 XLIII LATIN AMERICAN COMPUTER CONFERENCE (CLEI), 2017,
  • [23] MEASUREMENT AND EVALUATION OF THE MIPS ARCHITECTURE AND PROCESSOR
    GROSS, TR
    HENNESSY, JL
    PRZYBYLSKI, SA
    ROWEN, C
    ACM TRANSACTIONS ON COMPUTER SYSTEMS, 1988, 6 (03): : 229 - 257
  • [24] Graphic Library Optimization for MIPS Architecture
    Novkovic, Teodora
    Lukac, Zeljko
    Jovanovic, Petar
    Kastelan, Ivan
    ELEKTRONIKA IR ELEKTROTECHNIKA, 2020, 26 (02) : 69 - 76
  • [25] MIPS architecture reveals innovative features
    Levy, M
    EDN, 1999, 44 (20) : 32 - 32
  • [26] Reconfigurable molecular dynamics simulator
    Azizi, N
    Kuon, I
    Egier, A
    Darabiha, A
    Chow, P
    12TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS, 2004, : 197 - 206
  • [27] Middleware for a distributed reconfigurable simulator
    Kim, SH
    Tranter, WH
    Midkiff, SF
    35TH ANNUAL SIMULATION SYMPOSIUM, PROCEEDINGS, 2002, : 253 - 258
  • [28] A Component-based Simulator for MIPS32 Processors
    Chen, Yu
    Sarjoughian, Hessam S.
    SIMULATION-TRANSACTIONS OF THE SOCIETY FOR MODELING AND SIMULATION INTERNATIONAL, 2010, 86 (5-6): : 271 - 290
  • [29] CMOS AND ECL IMPLEMENTATION OF MIPS RISC ARCHITECTURE
    KHAN, A
    MICROPROCESSORS AND MICROSYSTEMS, 1990, 14 (06) : 367 - 375
  • [30] A graphical simulator for the cryptanalysis of block ciphers
    Boztas, S
    Rao, A
    Maru, B
    Tran, T
    ITHET 2004: PROCEEDINGS OF THE FIFTH INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY BASED HIGHER EDUCATION AND TRAINING, 2004, : 151 - 155
12345