Latest EDA tools reveal analog design's changing world

The development of latest EDA tools to simplify the design of mixed-signal chips is discussed. The tool considers a range of process nodes and design styles, from 180-nm analog and up to 45-nm digital and down. It also includes the design of system-in-a-package (SIP) or mixed signal at 90 nm, and RF system-on-a-chip (SoC) at 65 nm. The new menu structures mirror common features in Web browsers at the GUI level. The commands can be executed using user-programmable bind keys and object sensitive pop-up menus that display relevant operations for objects under the cursor. Cadence has also combined specification entry and design management into a single unified cockpit. The tests and the complete specifications can be shared and managed across multiple design groups. Beyond the L version's basic polygon layout editing features, XL's custom-block authoring physical-layout tool supports constraint-driven and schematic-driven physical implementation.