On-chip combined C-V/I-V transistor characterization system in 45-nm CMOS

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作者：
Department of Electrical Engineering, Columbia University, New York, NY 10027, United States [1 ]
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来源：
IEEE Symp VLSI Circuits Dig Tech Pap | 2011年 / 218-219期
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Compendex;
D O I：
5986113
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摘要：
Capacitance measurement
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