A high-performance CMOS bias-offset linear transconductor

被引：0
|
作者：
Matsumoto, Fujihiko [1 ]
Miyazawa, Toshio [1 ]
Nakamaura, Shintaro [1 ]
Noguchi, Yasuaki [1 ]
机构：
[1] Dept. Applied Physics, National Defense Academy, Hashirimizu 1-10-20, Yokosuka, Kanagawa, 239-8686, Japan
来源：
IEEJ Transactions on Electronics, Information and Systems | 2009年 / 129卷 / 08期
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D O I：
10.1541/ieejeiss.129.1518
中图分类号：
学科分类号：
摘要：
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页码：1518 / 1526
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