Optimum design of printed circuit board for warp reduction in reflow process

被引:0
|
作者
Nakagawa, Yasutada [1 ]
机构
[1] Toshiba Corporation, Corporate Manufacturing Engineering Center, 33 Shin-Isogo-cho, Yokohama-shi, Kanagawa, 235-0017, Japan
关键词
D O I
10.1299/kikaic.72.2021
中图分类号
学科分类号
摘要
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页码:2021 / 2026
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