Highly Reliable Lateral Migration-Based TFT-Type Neuron Device for Spiking Neural Networks

被引:0
|
作者
Park, Min-Kyu [1 ]
Hwang, Joon [1 ]
Bae, Jong-Ho [2 ]
Kim, Jae-Joon [1 ]
Lee, Jong-Ho [1 ]
机构
[1] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 08826, South Korea
[2] Kookmin Univ, Sch Elect Engn, Seoul 02707, South Korea
基金
新加坡国家研究基金会;
关键词
Tunneling; Logic gates; Silicon; Neurons; Electrons; Pulse measurements; Homeostasis; Neuron device; spiking neural networks; flash memory; lateral migration; CHARGE;
D O I
10.1109/LED.2024.3445970
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A CMOS-compatible Thin Film Transistor (TFT)-type Center Path neuron device with homeostasis characteristics is proposed. By modifying the charge injection path of the gate insulator stack, the proposed neuron device operates with lateral migration, which was conventionally perceived as a disadvantage in the memory industry. Various measured electrical characteristics of the Center Path device show that directly injected charges from the channel poly-Si to the charge trap Si3N4 with low operational voltage laterally migrate to the Si3N4 layer above the tunneling SiO2 layer. Furthermore, the proposed Center Path device successfully demonstrates the integration with homeostasis functionality observed in biological neurons due to its discrete operational schemes.
引用
收藏
页码:1780 / 1783
页数:4
相关论文
共 46 条
  • [1] Spiking Neural Networks With Time-to-First-Spike Coding Using TFT-Type Synaptic Device Model
    Oh, Seongbin
    Lee, Soochang
    Woo, Sung Yun
    Kwon, Dongseok
    Im, Jiseong
    Hwang, Joon
    Bae, Jong-Ho
    Park, Byung-Gook
    Lee, Jong-Ho
    IEEE ACCESS, 2021, 9 : 78098 - 78107
  • [2] Power and Area-Efficient XNOR-AND Hybrid Binary Neural Networks Using TFT-Type Synaptic Device
    Lee, In-Seok
    Kim, Hyeongsu
    Park, Min-Kyu
    Hwang, Joon
    Koo, Ryun-Han
    Kim, Jae-Joon
    Lee, Jong-Ho
    IEEE ELECTRON DEVICE LETTERS, 2023, 44 (02) : 325 - 328
  • [3] Hardware-Based Spiking Neural Network Using a TFT-Type AND Flash Memory Array Architecture Based on Direct Feedback Alignment
    Kang, Won-Mook
    Kwon, Dongseok
    Woo, Sung Yun
    Lee, Soochang
    Yoo, Honam
    Kim, Jangsaeng
    Park, Byung-Gook
    Lee, Jong-Ho
    IEEE ACCESS, 2021, 9 : 73121 - 73132
  • [4] Cointegration of the TFT-Type AND Flash Synaptic Array and CMOS Circuits for a Hardware-Based Neural Network
    Park, Min-Kyu
    Kang, Won-Mook
    Koo, Ryun-Han
    Kim, Jeong-Hyun
    Hwang, Joon
    Bae, Jong-Ho
    Kim, Jae-Joon
    Lee, Jong-Ho
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2023, 70 (01) : 93 - 98
  • [5] Deep spiking neural networks with integrate and fire neuron using steep switching device
    Yun Woo, Sung
    Pak, Sangyeon
    Lee, Sung-Tae
    Solid-State Electronics, 2024, 214
  • [6] Deep spiking neural networks with integrate and fire neuron using steep switching device
    Woo, Sung Yun
    Pak, Sangyeon
    Lee, Sung-Tae
    SOLID-STATE ELECTRONICS, 2024, 214
  • [7] Efficient Neuron Architecture for FPGA-based Spiking Neural Networks
    Wan, Lei
    Luo, Yuling
    Song, Shuxiang
    Harkin, Jim
    Liu, Junxiu
    2016 27TH IRISH SIGNALS AND SYSTEMS CONFERENCE (ISSC), 2016,
  • [8] Relaxation LIF: A gradient-based spiking neuron for direct training deep spiking neural networks
    Tang, Jianxiong
    Lai, Jian-Huang
    Zheng, Wei-Shi
    Yang, Lingxiao
    Xie, Xiaohua
    NEUROCOMPUTING, 2022, 501 : 499 - 513
  • [9] A Highly Scalable Junctionless FET Leaky Integrate-and-Fire Neuron for Spiking Neural Networks
    Kamal, Neha
    Singh, Jawar
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2021, 68 (04) : 1633 - 1638
  • [10] A CMOS-based Neuron Circuit for Spiking Neural Networks with Memristive Synapse
    Liu, Hai-jun
    Li, Ji-wei
    Li, Zhi-wei
    Li, Qing-jiang
    Diao, Jie-tao
    2018 INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATIONS AND MECHATRONICS ENGINEERING (CCME 2018), 2018, 332 : 550 - 555