An RTL design-space exploration method for high-level applications

被引：0

作者：

Kao, Peng-Cheng ^{[1
]}

Hsieh, Chih-Kuang ^{[1
]}

Su, Ching-Feng ^{[1
]}

Wu, Allen C.-H. ^{[1
]}

机构：

[1] Department of Computer Science, Tsing Hua University, Hsinchu, 30043, Taiwan

来源：

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2001年 / E84-A卷 / 11期

关键词：

Algorithms - Computer aided design - Curve fitting - Dynamic programming - Integrated circuit layout - Logic design - Optimization;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

In this paper, we present an RTL design-space exploration method for high-level applications. We formulate the RTL design-space exploration into a performance-driven module selection problem. We devise a dynamic-programming algorithm to solve the problem. We present an exploration flow by integrating commercial synthesis and layout tools with our proposed method. Experimental results have demonstrated that generating AT-curve for all modules is the most time consuming task in the design-space exploration process. Using the proposed 3-point AT projection approach, our method can achieve on an average of 80% speed-up in run time and 90% accuracy in design estimation.

引用

页码：2648 / 2654

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