Design of novel high-linearity double-balanced CMOS mixer

Proposed in this paper is a novel high-linearity double-balanced mixer for wireless radio frequency (RF) systems, which outputs signals without RF signal-related second-order nonlinear term. In this mixer based on a novel multiplier structure, RF signals are sent to the source and the drain of two symmetrical MOS (Metal Oxide Semiconductor) transistors in the linear region, and local oscillator (LO) signals are sent to the grid. Thus, the double-balanced mixing or multiplying of RF and LO signals are implemented with low complexity. Moreover, the differential push-pull amplifier and the source follower are used as the output buffer interfaces, thus improving the isolation between the mixer and the outside circuits, the power gain and the output matching ability. The proposed mixer is fabricated by 0.18 μm CMOS process and is used as a multiplier in ultra-wide band, with an input 1 dB compression point of 2.9 dBm, a third-order intermodulation of 16 dBm and a total power consumption of 25 mW. Test results demonstrate that the proposed mixer is of good performance and meets the requirements of high-performance and high-speed ultrawideband wireless communication systems.