Technology comparisons and the economics of flip chip packaging

被引:0
|
作者
Prasad, S. [1 ]
Sathyanarayan, S. [1 ]
机构
[1] APT Interactive, 235, 40th Cross, 5th Block, Jayanagar, Bangalore 560 041, India
关键词
Electric wire - Electronics packaging - Integrated circuit layout;
D O I
暂无
中图分类号
学科分类号
摘要
The decision to use flip chip packaging is not a simple one. Many equipment, product, and process variables affect the relative merits of flip chip vs. wire bonded packages. A detailed analysis of all of these factors can help to guide the decision and clarify the effects of the variables on the cost of different packaging approaches.
引用
收藏
相关论文
共 50 条
  • [1] Technology comparisons and the economics of flip chip packaging
    Prasad, S
    Sathyanarayan, S
    SOLID STATE TECHNOLOGY, 2001, : S18 - +
  • [2] Flip-chip packaging interconnect technology and reliability
    He, XL
    53RD ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2003 PROCEEDINGS, 2003, : 748 - 752
  • [3] Challenge of vacuum molded flip chip packaging technology
    Chai, K
    Wu, E
    Tong, JY
    POLYTRONIC 2002: 2ND INTERNATIONAL IEEE CONFERENCE ON POLYMERS AND ADHESIVES IN MICROELECTRONICS AND PHOTONICS, CONFERENCE PROCEEDINGS, 2002, : 221 - 224
  • [4] Flip chip packaging
    Werner, RG
    Frear, DR
    DeRosa, J
    Sorongon, E
    INTERNATIONAL SYMPOSIUM ON ADVANCED PACKAGING MATERIALS: PROCESSES, PROPERTIES AND INTERFACES, PROCEEDINGS, 1999, : 246 - 251
  • [5] Microrelay packaging technology using flip-chip assembly
    Miller, David C.
    Zhang, Wenge
    Bright, Victor M.
    Proceedings of the IEEE Micro Electro Mechanical Systems (MEMS), 2000, : 265 - 270
  • [6] Advantages of flip chip technology in millimeter-wave packaging
    Krems, T
    Haydl, WH
    Massler, H
    Rudiger, J
    1997 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS I-III: HIGH FREQUENCIES IN HIGH PLACES, 1997, : 987 - 990
  • [7] Next generation electronics packaging utilizing flip chip technology
    Pascariu, G
    Cronin, P
    Crowley, D
    IEEE/CPMT/SEMI(R) 28TH INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 2003, : 423 - 426
  • [8] Tomorrows Packaging - Chip Scale Packaging vs Flip Chip
    Boustedt, K.
    Vardaman, E.J.
    Microelectronics International, 1997, 14 (03): : 31 - 32
  • [10] High performance coreless flip-chip BGA packaging technology
    Chang, David
    Wang, Y. P.
    Hsiao, C. S.
    57TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2007 PROCEEDINGS, 2007, : 1765 - +