Implementation of orthogonal frequency division multiplexing modem using radix-N pipeline fast fourier transform (FFT) processor

被引：0
|
作者：
Oh, Jung-Yeol [1 ]
Cha, Jae-Sang [1 ,2 ]
Kim, Seong-Kweon [1 ,3 ]
Lim, Myoung-Seob [1 ]
机构：
[1] Information Communication Res. Ctr., Chonbuk National University, 664-14 Duck-jin dong, Jeon-ju, Korea, Republic of
[2] Dept. of Information and Commun. Eng, Seokyeong University, 16-1 Jung-eung dong, Sungbuk-ku, Seoul 136-704, Korea, Republic of
[3] Res. Inst. of Elec. Communication, Tohoku University, Katahira 2-1-1, Aoba-ku, Sendai 980-8577, Japan
来源：
Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers | 2003年 / 42卷 / 4 B期
关键词：
Computational complexity - Fast Fourier transforms - Field programmable gate arrays - Frequency division multiplexing - Local area networks - Microprocessor chips - Wireless telecommunication systems;
D O I：
10.1143/jjap.42.2176
中图分类号：
学科分类号：
摘要：
In this paper, a new Radix-N pipeline fast Fourier transform (FFT) processor for the implementation of IEEE 802.11a baseband orthogonal frequency division multiplexing (OFDM) modem for wireless local area network (WLAN) is proposed. The newly proposed scheme has a simple control structure and multiplication block is designed based on canonic signed digit (CSD) with N/4 twiddle factors, which enables both hardware complexity and power consumption to be reduced as about less 33% and 66% respectively than the conventional Radix-4 pipeline and Radix-2 pipeline structures. In order to verify the real time operation, the IEEE802.11a baseband OFDM test-bed with the newly proposed Radix-N pipeline FFT processor is implemented using field programmable gate array (FPGA) devices.
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页码：2176 / 2181
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