Neural network-based optimization of VLSI wafer fabrication

被引：0
|
作者：
Wang, Xiang-Dong [1 ]
Chen, Yong-Mei [1 ]
Wang, Shou-Jue [1 ]
Shi, Lin-Chu [1 ]
机构：
[1] Inst. of Semiconductors, Chinese Acad. of Sci., Beijing 100083, China
来源：
Zidonghua Xuebao/Acta Automatica Sinica | 2001年 / 27卷 / 03期
关键词：
Gradient descent method - Semiconductor production - Technological parameter - Wafer fabrication specification - Wafer yield;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
(Edited Abstract)
引用
收藏
页码：289 / 295
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