Design of small RSFQ microprocessor based on cell-based top-down design methodology

被引：0

作者：

Matsuzaki, Futabako ^{[1
]}

Yoda, Kenichi ^{[1
]}

Koshiyama, Junichi ^{[1
]}

Motoori, Kei ^{[1
]}

Yoshikawa, Nobuyuki ^{[1
]}

机构：

[1] Dept. of Elec. and Computer Eng., Yokohama National University, Yokohamashi, 240-8501, Japan

来源：

IEICE Transactions on Electronics | 2002年 / E85-C卷 / 03期

关键词：

CMOS integrated circuits - Computer aided design - Computer simulation - Decision theory - Josephson junction devices - Logic circuits - Microprocessor chips - Quantum electronics;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

We have proposed a top-down design methodology for the RSFQ logic circuits based on the Binary Decision Diagram (BDD). In order to show the effectiveness of the methodology, we have designed a small RSFQ microprocessor based on simple architecture. We have compared the performance of the 8-bit RSFQ microprocessor with its CMOS version. It was found that the RSFQ system is superior in terms of the operating speed though it requires extremely large area. We have also implemented and tested a 1-bit ALU that is one of the important components of the microprocessor and confirmed its correct operation.

引用

页码：659 / 664

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