A Unified Global and Local Interconnect Test Scheme for Xilinx XC4000 FPGAs

被引：0

作者：

Department of Electrical Engineering, University of Alberta, Edmonton, Alta. T6G 2V4, Canada ^{[1
]}

不详 ^{[2
]}

不详 ^{[3
]}

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来源：

IEEE Trans. Instrum. Meas. | / 2卷 / 368-377期

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Compendex;

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暂无

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摘要：

Algorithms - Computer software - Input output programs - Interfaces (computer) - Logic gates - Polynomials - Program debugging - Routers - Switches

引用

共 11 条

[1] A unified global and local interconnect test scheme for Xilinx XC4000 FPGAs
Sun, XL
Trouborst, P
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2004, 53 (02) : 368 - 377
[2] An Approach to Minimize the Test Configuration for the Logic Cells of the Xilinx XC4000 FPGAs Family
M. Renovell
J.M. Portal
J. Figueras
Y. Zorian
Journal of Electronic Testing, 2000, 16 : 289 - 299
[3] An approach to minimize the test configuration for the logic cells of the Xilinx XC4000 FPGAs family
Renovell, M
Portal, JM
Figueras, J
Zorian, Y
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2000, 16 (03): : 289 - 299
[4] Mapping full-systolic arrays for matrix product on XILINX's XC4000(E,EX) FPGAs
Oudjida, AK
Titri, S
Hamerlain, M
COMPEL-THE INTERNATIONAL JOURNAL FOR COMPUTATION AND MATHEMATICS IN ELECTRICAL AND ELECTRONIC ENGINEERING, 2002, 21 (01) : 69 - 81
[5] Testing Xilinx XC4000 configurable logic blocks with carry logic modules
Sun, XL
Xu, J
Trouborst, P
2001 IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2001, : 221 - 229
[6] Xilinx XC4000系列FPGA自动测试平台搭建
刘肄倬
杨志家
王宏
微计算机信息, 2010, 26 (11) : 10 - 12
[7] A Routability-Aware Algorithm for Both Global and Local Interconnect Resource Test and Diagnosis of Xilinx SRAM-FPGAs
Ruan, Aiwu
Huang, Haiyang
Wang, Jingwu
Zhao, Yifan
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2016, 32 (06): : 749 - 762
[8] A Routability-Aware Algorithm for Both Global and Local Interconnect Resource Test and Diagnosis of Xilinx SRAM-FPGAs
Aiwu Ruan
Haiyang Huang
Jingwu Wang
Yifan Zhao
Journal of Electronic Testing, 2016, 32 : 749 - 762
[9] A novel FPGA local interconnect test scheme and automatic TC derivation/generation
Sun, XL
Ogden, K
Chan, H
Trouborst, P
JOURNAL OF SYSTEMS ARCHITECTURE, 2004, 50 (05) : 267 - 280
[10] Modeling of FPGA local/global interconnect resources and derivation of minimal test configurations
Sun, X
Alimohammad, A
Trouborst, P
17TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2002, : 284 - 292

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