共 50 条
- [21] Low-power reference buffer for Successive Approximation Register Analog-to-Digital converters [J]. 2018 INTERNATIONAL CONFERENCE ON IC DESIGN AND TECHNOLOGY (ICICDT 2018), 2018, : 45 - 48
- [23] A non-binary capacitor array calibration circuit with 22-bit accuracy in successive approximation analog-to-digital converters [J]. 2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, CONFERENCE PROCEEDINGS, 2002, : 567 - 570
- [24] An ICA Framework for Digital Background Calibration of Analog-to-Digital Converters [J]. Sampling Theory in Signal and Image Processing, 2012, 11 (2-3): : 253 - 270
- [25] Digital background calibration technique for pipelined analog-to-digital converters [J]. PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, 2003, : 881 - 884
- [26] Digital Calibration and Correction Methods for CMOS Analog-to-Digital Converters [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2012, E95C (04): : 421 - 431
- [28] Recent Advances in Digital-Domain Background Calibration Techniques for Multistep Analog-to-Digital Converters [J]. 2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 1897 - 1900
- [29] An adaptive calibration technique of timing skew mismatch in time-interleaved analog-to-digital converters [J]. REVIEW OF SCIENTIFIC INSTRUMENTS, 2019, 90 (02):