Research on fault tolerant processor using dynamic reconfiguration

In this paper, we propose a reconfigurable fault tolerant architecture that can recover from failure status with spare space. Recently, progress in semiconductor technology has been remarkable due to microfabrication of devices. The semiconductor technique plays an important role in artificial satellites and aircraft. Furthermore, it has guaranteed the reliability of the circuits by the multiplexing structure. However, in embedded systems, space-saving is regarded to be as important as reliability. In the traditional approach, the area overhead tends to become large. Reconfigurable fault tolerance can achieve high area efficiency. In this research, we aim to improve the reliability and area efficiency for a single stuck-at fault of the processor. In this article, we reproduce the proposed method using Tcl script and proposed standalone fault tolerant operation using embedded Linux. © 2019 The Institute of Electrical Engineers of Japan.