Noise Improvement and High Dynamic Range in a CMOS Image Sensor With Shift Biasing Structure

In this article, a noise improvement anddynamic range (DR) enhanced CMOS image sensor (CIS),using a shift biasing structure, is proposed. The shift bias-ing pixel is constructed from a conventional 4T pixel andthree additional transistors, including a bias transistor (BT)and two switch transistors. The BT works as a switch toconnect the source and drain to accumulate electrons inthe source follower (SF) in shift biasing mode and providesan extra capacitance to enlarge the capacity of floatingdiffusion (FD) in low gain (LG) mode. Electron distributionand noise performance of SF are simulated to prove thefunction of shift biasing pixels. A prototype sensor, witha 512x128-pixel array, is fabricated with a 180 nm CISprocess. Measurement shows a temporal noise of 2 e-isachieved, which is a 2 e-noise improvement comparedwith the reference 4T readout mode of shift biasing pixel.Additionally, an over 92 dB DR is realized by combiningshift biasing mode and LG mode without any specific pro-cess or complex control circuits