A Novel High-Performance Voltage Differencing Buffered Amplifier

In this paper, a novel approach is introduced for the development of a power-efficient voltage differencing buffered amplifier (VDBA) by incorporating an adaptive biasing circuit. The proposed design is specifically tailored to exhibit low power consumption. The VDBA proposed in this study includes a conventional transconductance unit (TU) with an adaptive biasing and a positive feedback circuit. Incorporating adaptive bias cells and cross-coupled positive feedback circuit, the VDBA structure allows for boosted tunable gain based on the input differential voltage. The proposed VDBA shows improved transconductance gain, transient characteristics, linearity for a wide range of inputs, and reduced standby power dissipation. A mathematical formulation has been presented to define the characteristics of the proposed VDBA. To validate the proposed VDBA structure, SPICE simulations were conducted using 180 nm CMOS technology. The input linear range of the proposed VDBA is +/- 250 mV. The 3 dB bandwidth of the proposed structure is 200 MHz. The THD has been found low. The Monte Carlo simulations have also been carried out and found the proposed structure is less sensitive to the different parameter variations. The slew rate of the proposed VDBA is found 26.2 V/mu S. As an application example, a voltage mode universal MISO biquad filter is also proposed using the proposed structure VDBA.