SARDIMM: High-Speed Near-Memory Processing Architecture for Synthetic Aperture Radar Imaging

被引:0
|
作者
Kim, Haechan [1 ]
Heo, Jinmoo [2 ]
Lee, Seongjoo [3 ,4 ]
Jung, Yunho [1 ,2 ]
机构
[1] Korea Aerosp Univ, Sch Elect & Informat Engn, Goyang 10540, South Korea
[2] Korea Aerosp Univ, Dept Smart Air Mobil, Goyang 10540, South Korea
[3] Sejong Univ, Dept Elect Engn, Seoul 05006, South Korea
[4] Sejong Univ, Dept Convergence Engn Intelligent Drone, Seoul 05006, South Korea
来源
APPLIED SCIENCES-BASEL | 2024年 / 14卷 / 17期
关键词
synthetic aperture radar; range-Doppler algorithm; fast Fourier transform; memory bottleneck; near-memory processing; acceleration; CHIRP SCALING ALGORITHM;
D O I
10.3390/app14177601
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
The range-Doppler algorithm (RDA), a key technique for generating synthetic aperture radar (SAR) images, offers high-resolution images but requires significant memory resources and involves complex signal processing. Moreover, the multitude of fast Fourier transform (FFT) and inverse fast Fourier transform (IFFT) operations in RDA necessitates high bandwidth and lacks data reuse, leading to bottlenecks. This paper introduces a synthetic aperture radar dual in-line memory module (SARDIMM), which executes RDA operations near memory via near-memory processing (NMP), thereby effectively reducing memory accesses, execution time, and energy consumption. The embedded NMP module in SARDIMM optionally supports a combination of FFT, IFFT, and matched filter operations of the RDA for range and azimuth compression. The operator within the NMP module accelerates the FFT by performing two radix-2 single butterfly operations in parallel. The NMP module was implemented and validated on a Xilinx UltraScale+ field-programmable gate array (FPGA) using Verilog-HDL. The acceleration performance of RDA for images of various sizes was evaluated through a simulator modified with gem5 and DRAMSim3 and achieved a 6.34-6.93x speedup and 41.9-48.2% energy savings.
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页数:16
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