Accurate Evaluation of Threshold Voltage Hysteresis in SiC MOSFET Under Switching Stress

被引:0
|
作者
Li, Xu [1 ]
Deng, Xiaochuan [1 ]
Huang, Jingyu [1 ]
Li, Xuan [1 ]
Chen, Wanjun [1 ]
Zhang, Bo [1 ]
机构
[1] Univ Elect Sci & Technol China, Sch Integrated Circuit Sci & Engn, Exemplary Sch Microelect, Chengdu 610054, Peoples R China
基金
中国国家自然科学基金;
关键词
Stress; Logic gates; Silicon carbide; MOSFET; Voltage measurement; Stress measurement; Switches; Bipolar switching stress; hysteresis effect; SiC MOSFET; test delay; threshold voltage shift;
D O I
10.1109/TPEL.2024.3409570
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this letter, a novel method is proposed for accurately evaluating the transient recoverable threshold voltage (Vth) shift of silicon carbide (SiC) mosfet caused by hysteresis effect. Based on a resistive load circuit with the multistage gate drive module, the method achieves a fast switching from high-frequency bipolar switching gate bias stress to V-th acquisition. Furthermore, the method is experimentally verified with a 1200-V commercial SiC mosfet. The Vth shift is evaluated after bipolar switching stress, and the time interval between stress and measurement, i.e., the test delay, is reduced to 100 ns. In addition, the V-th shift with different test delays after 500-kHz bipolar stress is evaluated. The results demonstrate that the positive and negative V-th shifts measured after a delay time of 1 mu s can be underestimated by more than 32% and 22%, respectively, when compared to a shorter test delay of 100 ns.
引用
收藏
页码:14118 / 14121
页数:4
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