Auto-Generating Diverse Heterogeneous Designs

被引:0
|
作者
Vandebon, Jessica [1 ]
Coutinho, Jose G. F. [1 ]
Luk, Wayne [1 ]
机构
[1] Imperial Coll London, Dept Comp, London, England
基金
英国工程与自然科学研究理事会;
关键词
D O I
10.1109/IPDPSW63119.2024.00035
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a novel architecture for endto -end design automation, facilitating high-level design portability across diverse technologies. We introduce programmatic, customizable and reusable design-flows capable of generating multiple implementations (e.g., CPU, GPU, FPGA) from a single technology-agnostic high-level application source. Notably, our approach incorporates design-flow branch points and automated path selection strategies, mitigating the manual effort currently needed for efficient design production, particularly for heterogeneous platforms. To validate our approach, we implement optimizing design-flows tailored to different hardware platforms. Through experiments on five AI and HPC benchmarks, we demonstrate significant speed improvements compared to single threaded CPU execution. Our approach generates multi-thread CPU, CPU+FPGA, and CPU+GPU designs from a single highlevel source description, achieving speedups of up to 30 times for OpenMP multi-thread CPU, 32 times for oneAPI CPU+FPGA, and 779 times for HIP CPU+GPU designs. We also showcase cost-effective implementations targeting heterogeneous computing platforms. Additionally, these performance advancements are accompanied by gains in developer productivity, quantified based on added lines of code.
引用
收藏
页码:116 / 123
页数:8
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