Impedancemetry of multiplexed quantum devices using an on-chip cryogenic complementary metal-oxide-semiconductor active inductor

In the pursuit for scalable quantum processors, signi fi cant effort has been devoted to the development of cryogenic classical hardware for the control and readout of a growing number of qubits. The current work presented a novel approach called impedancemetry that is suitable for measuring the quantum capacitance of semiconductor qubits connected to a resonant LC-circuit. The impedancemetry circuit exploits the integration of a complementary metal-oxide-semiconductor (CMOS) active inductor in the resonator with tunable resonance frequency and quality factor, enabling the optimization of readout sensitivity for quantum devices. The realized cryogenic circuit allows fast impedance detection with a measured capacitance resolution down to 10 aF and an input-referred p ffiffiffiffiffiffi noise of 3.7 aF/ Hz. At 4.2 K, the power consumption of the active inductor amounts to 120 mu W, with an additional dissipation for on-chip current excitation (0.15 mu W) and voltage ampli fi cation (2.9 mW) of the impedance measurement. Compared to the commonly used schemes based on dispersive RF re fl ectometry which require millimeter-scale passive inductors, the circuit exhibits a notably reduced footprint (50 mu m 3 60 mu m), facilitating its integration in a scalable quantumclassical architecture. The impedancemetry method has been applied at 4.2 K to the detection of quantum effects in the gate capacitance of on-chip nanometric CMOS transistors that are individually addressed via multiplexing.