A 40nm 24.6TOPS/W Scalable EfficientDet Processor for Object Detection

Object detection is a crucial technology used to identify and locate objects in a wide range of applications. Google's EfficientDet, a scalable solution, employs a compound scaling method to systematically adjust the network's depth, width, and input resolution, meeting different resource constraints on edge devices. This paper presents the first dedicated processor for EfficientDet, featuring three key elements: 1) an adaptive channel/input-wise (CIW) mapper to improve hardware utilization by applying distinct mapping strategies for layers with varying data shapes, 2) a tri-mode activation compression (AC) engine to reduce external memory access (EMA) by leveraging the sparsity level of activations, and 3) a unified aggregation core (AggrCore) to flexibly handle different computations. The chip is fabricated using TSMC 40nm CMOS technology and achieves a maximum energy efficiency of 24.6TOPS/W. Compared to the state-of-the-art object detection processor, our chip demonstrates 3.7x and 2.1x improvements in energy and area efficiencies, respectively.