Modeling of Threshold Voltage Degradation of 22nm FD-SOI nMOSFETs Under Dynamic Voltage Scaling

In this work, we investigated a compact model for characterizing Positive Bias Temperature Instability (PBTI) in 22nm FD-SOI nMOSFETs under dynamic voltage scaling (DVS). This model exhibits high flexibility in predicting PBTI-related threshold voltage degradation in both DC and DVS operations. We measured the impact of time-varying stress and recovery bias conditions, revealing a robust correlation between degradation and relaxation. We integrated the coupling of interface traps and fixed charges into the model, which is deemed a significant contribution. As a result, the model demonstrates high predictive accuracy across various stress conditions, including DC/AC, multiple cycles, and different duty cycles.