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Flip-chip technology at room temperature: A new design of microtube-based interconnect for improved mechanical and electrical properties
被引:2
|作者:
Desbordes, Cloe
[2
]
Pesci, Raphael
[2
]
Piotrowski, Boris
[2
]
Mailliart, Olivier
[1
]
Raphoz, Natacha
[1
]
机构:
[1] Univ Grenoble Alpes, CEA LETI, DOPT, LAIP, 17 Ave Martyrs, F-38054 Grenoble, France
[2] Univ Lorraine, LEM3,CNRS, ENSAM Arts & Metiers Sci & Technol, UMR 7239, 4 Rue Augustin Fresnel, F-57078 Metz 3, France
关键词:
Flip;
-chip;
Interconnect;
Electrical resistance;
Assembly force;
Test vehicle;
Numerical simulations;
AU THIN-FILMS;
ELASTIC PROPERTIES;
INSERTION;
BEHAVIOR;
D O I:
10.1016/j.sna.2024.115674
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
Flip-chip assembly of photonic components can be achieved at room temperature by using 10 mu m pitch interconnects made of metallised oxide microtubes inserted into ductile reception pads. In order to reduce the electrical resistance of interconnects and the assembly force required, interconnect design in regard to geometry and materials used are optimised through electrical and mechanical finite elements (FEM) simulations. To reduce electrical resistance, one may increase the metallisation thickness or microtube inner diameter. To minimise the assembly force, reducing the reception pad diameter is recommended. Experiments on silicon (Si) test vehicles are conducted to validate these predictions; they indicate that there is no short circuit, with an effectiveness of 100 %. This is achieved first through the assembly of Al-0.5 %wCu metallised oxide microtubes into Al-0.5 %wCu reception pads, using a force less than 10 mN/interconnect and proved to have a resistance of 230 m Omega. Second, with gold (Au) metallised oxide microtubes in indium (In) pads assembled with a force less than 0.7 mN/ interconnect. Last interconnects have a resistance of 670 m Omega/interconnect and can still be reduced to 500 m ohm by 2 h annealing at 100 degrees C.
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页数:12
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