Application of machine learning techniques to chip design

被引：0

作者：

Sudhakaran, Sunil ^{[1
,2
]}

机构：

[1] NVIDIA, 450 Jane Stanford Way, Stanford, CA 94305 USA

[2] Stanford Univ, 450 Jane Stanford Way, Stanford, CA 94305 USA

来源：

2024 IEEE WORKSHOP ON MICROELECTRONICS AND ELECTRON DEVICES, WMED | 2024年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The current state-of-the-art chip design process is incredibly difficult and filled with challenges across the various phases from early-stage architectural planning all the way to post-silicon characterization and production. This talk explores some of these challenges with an emphasis on I/O design and signal integrity. A few interesting problems related to the design and manufacturing of chips will be presented including applications of numerical optimization and machine learning techniques.

引用

页码：XV / XV

页数：1

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