A Power-Efficient Autonomous Current Adaptation ADC Input Driver

This paper presents a power-efficient autonomouscurrent adaptation input driver (ACAID) for analog-to-digitalconverters (ADCs), which employs floating-gate transistors toprovide reconfigurability. The proposed ACAID autonomouslyincreases the supply current at the onset of the tracking phase,achieving a high slew rate. As the driver output voltage graduallyfollows the input signal in the RC-settling or hold phase, thesupply current successively diminishes back to the original lowquiescent level. The required sensing and actuating circuits forcurrent adaptation are inherent components in the adoptedcapacitive feedback topology. A prototype version of the proposedACAID has been designed and fabricated in a 0.35 mu m CMOSprocess, along with integrated charge programming circuits anda 10-bit successive approximation register ADC. With 0.5 pFsampling capacitors loading the driver, the proposed ACAIDachieves-70.1 dB total harmonic distortion (THD) with a100 kHz input signal with 2.8Vppamplitude. When connectedto an on-chip ADC with a 200 kHz sampling rate, the measuredeffective number of bits (ENoB) near the Nyquist rate is 9.1.The proposed ACAID saves more power as the input frequencyincreases or when the portion of the tracking period reduces. Theprototyped driver circuit can save 49.5% power consumptionwhen the input frequency is 100 kHz with a 10% duty cycle fortracking. The power-saving ratio can be up to 76.2% when thesampling rate increases to 1 MHz