共 50 条
- [1] Development of Ultra-thin Low Warpage Coreless Substrate [J]. 2013 IEEE 63RD ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2013, : 1846 - 1849
- [2] Comparison of Global Optimization Algorithms for Inverse Design of Substrate Metal Density for Low Warpage Design in Ultra-Thin Packages [J]. IEEE 71ST ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2021), 2021, : 2320 - 2327
- [3] Simulation Method of Ultra-Thin Silicon Wafers Warpage [J]. PROCEEDINGS OF THE NINETEENTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM 2020), 2020, : 1134 - 1138
- [4] Experimental Investigation of Ultra-Thin Silicon Wafers Warpage [J]. 2021 INTERNATIONAL CONFERENCE ON ELECTRONICS PACKAGING (ICEP 2021), 2021, : 107 - 108
- [6] Inverse Design of Substrate from Warpage Surrogate Model Using Global Optimisation Algorithms in Ultra-Thin Packages [J]. 2020 IEEE 70TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2020), 2020, : 2309 - 2316
- [9] Thermocompression Bonding Process Design and Optimization for Warpage Mitigation of Ultra-thin Low-CTE Package Assemblies [J]. 2016 IEEE 66TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2016, : 101 - 107