CSIFA: A Configurable SRAM-based In-memory FFT Accelerator

In the era of Artificial Intelligent (AI) and big data, the demand for signal processing algorithms for large datasets has grown across various fields, notably in the application of the Fast Fourier Transform (FFT). This algorithm is crucial in computation and storage-heavy applications like image and radar signal processing, where it has been integral for decades. In-memory computing (IMC), unlike traditional computing models, integrates computation and storage in the same unit, reducing data transfer time and energy costs. This paper presents CSIFA, a hardware accelerator for up to 1024-point FFT algorithm, utilizing SRAM and some other digital logic to enhance efficiency. Our evaluation indicates that CSIFA performing FFT is able to achieve an overall throughput 15MB/s, computational power 6.65mW, and 115.3GOPS, showcasing its high throughput and energy efficiency for edge application scenarios.