Parallelism in Deep Learning Accelerators

被引：0

作者：

Song, Linghao ^{[1
]}

Chen, Fan ^{[1
]}

Chen, Yiran ^{[1
]}

Li, Hai Helen ^{[1
]}

机构：

[1] Duke Univ, Durham, NC 27706 USA

来源：

2020 25TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, ASP-DAC 2020 | 2020年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Deep learning is the core of artificial intelligence and it achieves state-of-the-art in a wide range of applications. The intensity of computation and data in deep learning processing poses significant challenges to the conventional computing platforms. Thus, specialized accelerator architectures are proposed for the acceleration of deep learning In this paper, we classify the design space of current deep learning accelerators into three levels, (1) processing engine, (2) memory and (3) accelerator, and present a constructive view from a perspective of parallelism in the three levels.

引用

页码：645 / 650

页数：6

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