A 7.1 GHz+23.7 dBm OIP3 1-dB NF Cascode LNA for next-generation Wi-Fi using a 130 nm SOI CMOS Technology

A 7.1 GHz source-degenerated cascode low noise amplifier (LNA) for next-generation Wi-Fi infrastructure applications is presented in this paper. The LNA employs a floatingbody (FB) nMOS transistor as a common source (CS) device because of its high f(T) and low NFmin. For common gate (CG), a thick-oxide body butted source (BBS) device with a higher channel length is employed. The thick-oxide BBS device as CG helps increase the LNA's power handling capability and achieve high gain and linearity. A parallel inductor with dual thick copper helps boost the quality factor (Q) of the gate inductor. The prototype LNA is fabricated in a 130 nm high resistivity (HR) silicon on insulator (SOI) technology. In measurements, the designed LNA achieves 16.5 dB gain, +7.2 dBm input third-order intercept point (IIP3), 1.03 dB NF, -5.5 dBm input referred 1-dB compression point (IP1dB) at 7.1 GHz while consuming only 24.5 mW of DC power.