FPGA-based hardware/firmware co-design for real-time radiometric correction onboard microsatellite

被引:0
|
作者
Ghelamallah, Youcef [1 ]
Rachedi, Azzeddine [1 ]
机构
[1] Algerian Space Agcy, Satell Dev Ctr, POS 50 Ilot T12 Bir El Djir, Oran 31130, Algeria
关键词
Earth observation microsatellite; CCD sensor; Multispectral imager; Radiometric image correction; FPGA;
D O I
10.1007/s11554-024-01536-3
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Remote sensing images are inevitably produced with radiometric artifacts due to the photo-response non-uniformity of charge-coupled device (CCD) sensors. In situations where time constraints demand the prompt acquisition of imaging products, integrating an onboard radiometric correction system becomes essential. This paper advocates for a hardware-firmware co-design approach to achieve radiometric correction within the payload front-end electronics (FEE), leveraging the capabilities of field programmable gate array circuits (FPGA). The selection of an appropriate CCD sensor and optical device is guided by a thorough payload mission analysis, ensuring compliance with the specifications derived from Alsat-1B, the Algerian microsatellite launched in September 2016. Simulation results demonstrate that the designed FPGA firmware effectively controls the CCD sensor and configures its settings to achieve real-time radiometric correction of the acquired pixels in accordance with the mission requirements. To ensure efficient utilization during imaging operations, a hardware solution for onboard storage and in-orbit update of the radiometric coefficients has been considered for the radiometric correction system.
引用
收藏
页数:11
相关论文
共 50 条
  • [1] FPGA-Based Software Profiler for Hardware/Software Co-design
    Saad, El-Sayed M.
    Awadalla, Medhat H. A.
    El-Deen, Kareem Ezz
    NRSC: 2009 NATIONAL RADIO SCIENCE CONFERENCE: NRSC 2009, VOLS 1 AND 2, 2009, : 475 - 482
  • [2] Software profiler for fpga-based hardware/software co-design
    Department of Communication, Electronics and Computers, Faculty of Engineering, University of Helwan, Egypt
    不详
    J Eng Appl Sci, 2009, 1 (59-76):
  • [3] Accelerating an FPGA-Based SAT Solver by Software and Hardware Co-design
    MA Kefan
    XIAO Liquan
    ZHANG Jianmin
    LI Tiejun
    ChineseJournalofElectronics, 2019, 28 (05) : 953 - 961
  • [4] Accelerating an FPGA-Based SAT Solver by Software and Hardware Co-design
    Ma, Kefan
    Xiao, Liquan
    Zhang, Jianmin
    Li, Tiejun
    CHINESE JOURNAL OF ELECTRONICS, 2019, 28 (05) : 953 - 961
  • [5] Co-design of Hardware and Algorithms for Real-time Optimization
    Kerrigan, Eric C.
    2014 EUROPEAN CONTROL CONFERENCE (ECC), 2014, : 2484 - 2489
  • [6] FPGA-based cloud detection for real-time onboard remote sensing
    Williams, JA
    Dawood, AS
    Visser, SJ
    2002 IEEE INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), PROCEEDINGS, 2002, : 110 - 116
  • [7] Hardware/software co-design of a real-time kernel based tracking system
    Ali, Usman
    Malik, Mohammad Bilal
    JOURNAL OF SYSTEMS ARCHITECTURE, 2010, 56 (08) : 317 - 326
  • [8] FPGA-Based Parallel Hardware Architecture for Real-Time Image Classification
    Qasaimeh, Murad
    Sagahyroon, Assim
    Shanableh, Tamer
    IEEE TRANSACTIONS ON COMPUTATIONAL IMAGING, 2015, 1 (01) : 56 - 70
  • [9] An FPGA-based Parallel Hardware Architecture for Real-time Eye Detection
    Kim, Dongkyun
    Jung, Junhee
    Thuy Tuong Nguyen
    Kim, Daijin
    Kim, Munsang
    Kwon, Key Ho
    Jeon, Jae Wook
    JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2012, 12 (02) : 150 - 161
  • [10] FPGA-Based Hardware Implementation of Real-Time Optical Flow Calculation
    Seyid, Kerem
    Richaud, Andrea
    Capoccia, Raffaele
    Leblebici, Yusuf
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, 2018, 28 (01) : 206 - 216